This invention is generally related to the use of multiple-bus architectures in electronic systems to achieve higher bandwidth connections.
A bus serves as a low cost and versatile, shared communication link between the devices of an electronic system. The bus defines a single interconnection scheme, so that new devices that connect to the bus can be developed and easily added to the system. The cost is low since a single set of wires or other media are shared by the devices. However, the bus does create a communication bottleneck especially when there are a relatively large number of devices that may need to be connected to it.
In some electronic systems, an integrated circuit (IC) that acts as a concentrator is connected to multiple other ICs that act as expanders. An example of a concentrator is a bridge that can interface a processor-memory bus on one side, to multiple expander devices on another side. The expander devices connect to input/output (I/O) buses, and can implement functions that are either optional in the system or too costly to integrate into a single IC die.
Each expander device may be connected to the concentrator by a single bus, and by using a split transaction bus protocol. In such a protocol, the full transaction, e.g. read or write, is broken into two parts: a request packet and a completion packet. For instance, in a read transaction, the expander issues a request packet that specifies an address from which to read data. Next, once the data has been read by the concentrator, a completion packet is sent to the expander enclosing the read data. Thus, such a bus protocol provides higher bandwidth, because the bus is available for other transactions during the time the concentrator is accessing the read data. However, a split transaction bus usually has higher latency as compared to a fully tenured bus in which a bus agent holds the bus while waiting for the read data to become available.
One way to increase the bus bandwidth between two devices is to use multiple buses as completely separate entities. In that case, each full transaction, including request and completion packets, is performed on a single bus, and transactions are alternately fed to one bus and then the other. Another solution is to use a pair of oppositely directed, unidirectional buses. Finally, bandwidth can be increased by simply enlarging the data handling portion of a single bus.